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I am looking for a good embedded PC to run ROS on. I recently came across a couple of little machines using new very multi-core processors, such as the Epiphany and the XMOS.
Since the one thing that ROS really seems to want is cores, would ROS be able to take advantage of all of these cores? Or are they all just too feeble with too little RAM to be of any use?
Would it make more sense to focus on machines with fewer, more powerful cores?
Short answer; it depends.
ROS is a framework that can support multiple cores, but it is up to the ROS modules themselves to thrive in a multi-core environment. You can NOT expect ROS to automatically use all the cores, but if your software is written in a way that they can be used, then ROS will accommodate them.
A little generic history; There was a way that program processes used to talk to each other within a computer. Soon that grew into a method where those process could communicate within the same computer or on to a physically separate computer. And then high efficiency versions of that became the basis for ROS and Microsoft RDS. Microsoft found the project so successful they merged it with an existing technology SOAP, and developed WCF. The part you probably do not know is that WCF is being implemented as a processor to processor and/or sub-processor communication protocol on the hardware bus (with strong focus on robotic potential). The point is, that the message switching architectures pioneered by ROS and MRDS are super robust to the point where something similar will probably power hardware a generation or 2 from now.
Yes, by all means, use multi-core as much as possible. If you write code today that doesn't consider async and multi-core you might as well choose a different career path. There is little difference to writing well for 4 heavy cores, or 2000 small ones. Some difference, but if you know how to do one, you probably understand how to do the other as well.
I can't comment on Epiphany, but you can absolutely connect additional RAM to an XMOS to be able to run ROS if the onboard 64KB/core RAM isn't sufficient. Check out the libraries on the XCore Github page:
The XK-XMP-64 reference design has onboard SDRAM and the PDF schematics are in the Git repository if you want to go that route.
I'm picturing a lot of wrapper functions to call ROS functions and pass/stream data between threads with the XMOS inter-thread communication channels. There's a lot of design decisions you would have to make with respect to what threads to run on which cores -- if you run multiple threads on the same core, the 400-500 MIPS per core is split among them.
