In many real-time PID control loop application I have seen that the control loop is triggered exactly as the ADC interrupts arrives in order to achieve maximum synchronization between feedback conversion and control loop execution.
I am in a situation where it would be better to have the control loop triggered by a timer interrupt so that it can be indipendent from how the feedback is acquired, for example:
- Capacitive encoder read through ADC -> interrupts;
- Hall absolute encoder read through I2C -> no interrupts;
In the first case I have a sample available each 4ms. How fast the control loop should be triggered? What are the drawbacks of this implementation? Is it possible to take this issue into account when modeling the digital control system?
Thank you for your time.
Yes I am controlling a motor that can use different kind of encoders (one at time). Each encoder implements the same software interface so that I can keep motor logic indipendent from encoder internals.
The rising edges in the image are the instants the feedback is sampled and thus made available by ADC interrupts. The sampling period is 4ms. Assuming the control loop executes its calculation in the same time as the sampling period, what happens if the control loop interrupt is triggered late in respect to the ADC interrupt?